Full Adder

Realize a full adder using 2 half adders.
Sol: In the circuit diagram
and

Maximum ModulusTheorem

 It states that consider a rational function F(s). Consider a region in s plane such that no singularities i.e. poles lie within or on the boundary of the region. Then the function F(s) attains maximum magnitude in that region on the boundary and this maximum is bounded.If |F(s)| attains maximum value on a boundary, then theorem may be applied to |1/F(s)| and it can be shown that |F(s)| attains its minimum value in the region on the boundary, provided there are no zeros within or on the boundary of the region.

Multiplexer

Design a full subtractor using Multiplexer IC.
Sol: This is similar to full adder using Multiplexer. The truth table of full subtractor is
 

C	B	A	D	B
0	0	0	0	0
0	0	1	1	1
0	1	0	1	1
0	1	1	0	1
1	0	0	1	0
1	0	1	0	0
1	1	0	0	0
1	1	1	1	1

One IC displays the difference and other displays the borrow.
 The select lines of the ICs are short circuited. This is shown in fig.
The inputs of the first IC are given as follows
D0=D3=D5=D6=0V
And rest of the inputs(D1,D2,D4,D7) are connected to +5V. Vcc, Ground and enable pins are connected suitably.
In the case of second IC, D0=D4=D5=D6=0V and rest of the inputs (D1,D2,D3,D7) are connected to +5V.Vcc, Ground and enable pins are connected suitably. The output of the first IC is the difference and output of the other IC is the borrow.

Multiplexer

Design a full adder using Multiplexer.
Sol:For this we use 2 Mulplexer IC74151.

C	B	A	Sum	Carry
0	0	0	0	0
0	0	1	1	0
0	1	0	1	0
0	1	1	0	1
1	0	0	1	0
1	0	1	0	1
1	1	0	0	1
1	1	1	1	1

One IC displays the sum and other displays the carry.
 The select lines of the ICs are short circuited. This is shown in fig.
The inputs of the first IC are given as follows
D0=D3=D5=D6=0V
And rest of the inputs (D1,D2,D4,D7) are connected to +5V. Vcc, Ground and enable pins are connected suitably.
In the case of second IC, D0=D1=D2=D4=0V and rest of the inputs(D3,D5,D6,D7)
are connected to +5V.Vcc, Ground and enable pins are connected suitably. The output of the first IC is the sum and output of the other IC is the carry.

Multiplexer

Check whether the 3 bit binary number given as input is even or odd.
Sol: Use a Multiplexer IC 74154. The inputs are S0,S1,S2. The other inputs D0,D2,D4,D6 are connected to +5V and D1,D3,D5,D7 inputs are connected to 0V. Vcc is connected to +5V and GND and enable pin is connected to 0V. Output is taken from Y.

ic74151

The led will glow when  S2 S1 S0 is 000,010,100,110 indicating , these are even numbers.

5211 code

Design a circuit which receives 5211 code and detects decimal numbers 0,2,4,6 and 8.
Sol: First prepare a truth table of the circuit as given below.

Decimal	5(A)	2(B)	1(C)	1(D)	Output
0	0	0	0	0	1
1	0	0	0	1	0
2	0	0	1	1	1
3	0	1	0	1	0
4	0	1	1	1	1
5	1	0	0	0	0
6	1	0	1	0	1
7	1	1	0	0	0
8	1	1	1	0	1
9	1	1	1	1	0

Minimization is done using Kmap and we get
f=(A*)(D*)+(A*)C+C(D*)
Now draw the logic diagram using NAND.
[Here "*" represents complement.i.e. A*=A complement]

BCD to 84-2-1 code converter

Design a circuit which generates a 84-2-1 code when a BCD input is given.
Sol: Write down the truth table.

BCD					8	4	-2	-1
A	B	C	D		S1	S2	S3	S4
0	0	0	0		0	0	0	0
0	0	0	1		0	1	1	1
0	0	1	0		0	1	1	0
0	0	1	1		0	1	0	1
0	1	0	0		0	1	0	0
0	1	0	1		1	0	1	1
0	1	1	0		1	0	1	0
0	1	1	1		1	0	0	1
1	0	0	0		1	0	0	0
1	0	0	1		1	1	1	1

By minimizing this using K map, we get
S1=C+AD+BD
S2=D⊕(A+B)
S3=A⊕B
S4=B
Now draw the circuit using logic gates.

Digital electronics lab-K map minimisation

1. Design a circuit which generates the square of 3 bit BCD number.

Sol: The Square of a 3 bit BCD number is a 6 bit number. So first write the truth table.

          INPUT                                                                                         OUTPUT

A	B	C		S6	S5	S4	S3	S2	S1
0	0	0		0	0	0	0	0	0
0	0	1		0	0	0	0	0	1
0	1	0		0	0	0	1	0	0
0	1	1		0	0	1	0	0	1
1	0	0		0	1	0	0	0	0
1	0	1		0	1	1	0	0	1
1	1	0		1	0	0	1	0	0
1	1	1		1	1	0	0	0	1

By minimal expressions are given as follows (you can use K map to do this)

S1=C

S2=0

S3=BC*

S4=C (A⊕B)

S5=A (B*+C)

S6=AB

[“*” represents complement]

Using these equations logic diagrams can be drawn.