Design a circuit which receives 5211 code and detects decimal numbers 0,2,4,6 and 8.
Sol: First prepare a truth table of the circuit as given below.
Decimal | 5(A) | 2(B) | 1(C) | 1(D) | Output | ||||||||||
0 | 0 | 0 | 0 | 0 | 1 | ||||||||||
1 | 0 | 0 | 0 | 1 | 0 | ||||||||||
2 | 0 | 0 | 1 | 1 | 1 | ||||||||||
3 | 0 | 1 | 0 | 1 | 0 | ||||||||||
4 | 0 | 1 | 1 | 1 | 1 | ||||||||||
5 | 1 | 0 | 0 | 0 | 0 | ||||||||||
6 | 1 | 0 | 1 | 0 | 1 | ||||||||||
7 | 1 | 1 | 0 | 0 | 0 | ||||||||||
8 | 1 | 1 | 1 | 0 | 1 | ||||||||||
9 | 1 | 1 | 1 | 1 | 0 |
f=(A*)(D*)+(A*)C+C(D*)
Now draw the logic diagram using NAND.
[Here "*" represents complement.i.e. A*=A complement]
is it important to use nand gates itself for realisation??
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